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  ? semiconductor components industries, llc, 2013 september, 2013 ? rev. 0 1 publication order number: ncp4810/d ncp4810 x2 capacitors discharger the ncp4810 is a hv switch suitable for implementation of the x2 capacitor discharge function in applications with extremely low standby consumption requirements. it contains two high voltage mosfets with 700 v peak capabilities that can be connected directly to ac line voltage. implementing this ic helps to design optimized emi filter with appropriate x2 capacitor and reduced emi coil volume and losses. features ? build ? in 700 v mosfet ? minimum discharge capability 0.85 ma ? self consumption below 11 mw @ 700 v ? nov cc necessary ? compact soic ? 8 package ? ? 40 c to + 125 c operating temperature range ? this is a pb ? free device typical applications ? auxiliary power supply ? ac ? dc adapter ? standby power supply ? offline battery charger device package shipping ? ordering information NCP4810DR2G soic ? 8 (pb ? free) 2500 / tape & reel soic ? 8 d suffix case 751 marking diagram a = assembly location l = wafer lot y = year w = work week x = assembly lot g = pb ? free package http://onsemi.com 1 8 ncp4810g alywx 1 8 ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specifications brochure, brd8011/d. pinout nc ac1 ac1 nc nc ac2 ac2 nc
ncp4810 http://onsemi.com 2 ncp4810 figure 1. typical application example of the x2 discharger gnd dc output x2 ? 2 x2 ? 1 c1 ac1 ac2 r1 r2 cx2 l1 cx1 ac input x1 ? 1 x1 ? 2 pin function description pin n  pin name function pin description 1 nc not connected ? 2 ac1 alternate current 1 terminal for connections ac line 3 ac1 alternate current 1 terminal for connections ac line 4 nc not connected ? 5 nc not connected ? 6 ac2 alternate current 2 terminal for connections ac line 7 ac2 alternate current 2 terminal for connections ac line 8 nc not connected ? figure 2. simplified circuit architecture ac1 ac2 + ? ? + s r set clr r s set clr q q q q t del delay t del delay i disch v ac(start) v ac(start) i disch
ncp4810 http://onsemi.com 3 maximum ratings rating symbol value unit ac1 pin voltage related to ac2 pin v hv ? 700 to 700 v thermal resistance, junction ? to ? air (50 mm 2 x 35  m cu) r  j ? a 162 c/w junction temperature t j ? 40 to +150 c storage temperature range t stg ? 60 to +150 c esd capability, hbm model per jedec standard jesd22, method a114e v esd ? hbm 4 kv esd capability, machine model per jedec standard jesd22, method a115a v esd ? mm 600 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. the latchup tests were not provided on this device because of two function pins only. electrical characteristics (for typical values t j = 25 c, for min/max values t j = ? 40 c to +125 c, unless otherwise noted.) parameter conditions symbol min typ max unit hv pin discharge current capability v ac = 400 vdc i disch 0.85 ? ? ma minimum hv voltage i ac = i disch * 0.95 v ac(start) ? ? 40 vdc i hv or i hv(strat) leakage current v ac = 700 vdc i ac(leak) ? 7 15  a internal timer internal timer ? t del 15 ? ? ms
ncp4810 http://onsemi.com 4 typical characteristics temperature ( c) ? 40 110 ? 25 ? 10 95 80 65 5203550 figure 3. i hv or i hv(start) leakage current, i ac(leak) i ac(leak) (  a) 9.5 9.0 8.5 8.0 7.5 7.0 temperature ( c) ? 40 110 ? 25 ? 10 95 80 65 5203550 figure 4. discharge current capability, i disch i disch (ma) 1.75 1.50 1.25 1.00 0.75 temperature ( c) ? 40 110 ? 25 ? 10 95 80 65 5203550 figure 5. minimum hv voltage, v ac(start) v ac(start) (v) 25.00 24.75 24.50 24.25 24.00 temperature ( c) ? 40 110 ? 25 ? 10 95 80 65 5203550 figure 6. internal timer, t del t del (ms) 55 50 45 40 35 30 25 125 125 125 125 function description: the input sinusoidal voltage resets the relevant internal timer by transitioning across zero level at each its half wave. if no zero cross is detected, the internal timer expires and the appropriate current sink is turned on. this discharging path (the current sink and opposite diode) is established until the x2 capacitors are discharged (the input terminal voltage v ac drops to zero) or the input ac voltage is restored by re ? plugging the mains. the minimum discharge voltage is defined by v ac(start) . low v ac(start) allows to use serial resistors to distribute loss during discharging process. the recommended resistors values (r1 and r2) for any x2 capacitor are mentioned in table 1. every possibility of ic function refer to the input voltage behavior is described on figure 7. table 1. recommended series resistors values x2 capacitance total series resistance (r1 + r2) 500 nf 1.5 m  750 nf 1.02 m  1  f 780 k  1.5  f 480 k  2  f 360 k 
ncp4810 http://onsemi.com 5 figure 7. function description discharge current mains plugged unplugged v ac v ac(start) i disch t = t del t < t del t + t del
ncp4810 http://onsemi.com 6 package dimensions soic ? 8 nb case 751 ? 07 issue ak seating plane 1 4 5 8 n j x 45  k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m  1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155  mm inches  scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other inte llectual property. a listing of scillc?s pr oduct/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ncp4810/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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